Long before semiconductor memory became the norm for computers both big and small, core memory prevailed.   The chief feature of core memory was  it's ability to remember its contents after power is removed. Its disadvantage was cost and speed. Shown below is a 8k by 19 bit core plane from a Digital Equipment Corporation MF10 memory box which was used with the KI- 10 timesharing computer.  It is one of four boards which comprise a "memory kit of 65 kilowords". There were 8 kits in an MF-10 box thus providing 65 kwords of storage with parity checking.

At the factory,  and working with high powered magnifiers, it was necessary to thread four separate, enamel coated wires through  very small iron "donuts". One wire was used for the X axis and another for the Y axis. Depending on the direction of current flow in the X and Y lines, the iron donuts would get magnetized with the field being in a clockwise or anti-clockwise direction within the donut. The field direction would designate a logical '1' or '0' .To read the contents of these donuts, a  'SENSE' wire was used.  In reading the donuts, that action would cause the reversal of the magnetic field in the donut so an "INHIBIT"  wire  had to be strung into the core plane to prevent that from happening. This is a very simplified explanation of core memory operation.

The core plane shown below is 18 bits wide  plus parity. It takes two memory kits  to comprise a 36 bit word, the length used in DECs  series DEC10 computers. When used in the right side of the word, the parity bit was active. If the kit was used in the left side of the word , the parity bit would be ignored. It would be more expensive to have two different kits (with and  without parity) so having a kit which could be used in either side of the word was the way to go.

Memory kit failures were usually limited to single bit failures which in many cases were intermittent.  The way to troubleshoot intermittent bit failures was to swap left and right memory kits in a particular position and run  memory diagnostics. . Suppose it was bit 2 that was failing.  (Bit 0 was at the left side of the word; bit 35 was at the right side). By swapping left and right sides of the 36 bit word, then the failing bit should become  bit 20. Due to the high cost of core memory repairs, it was necessary to confirm memory failures.

In the 1980s, Digital Equipment charged a $10,000 flat rate to fix any memory kit failures hence the importance of fault verification.  Memory failures were frequent . Today's mainframe users would never tolerate the amount of unavailability that users experienced in the 1970s and 1980s as a result of memory failures. But that was  tolerated in that era.  With each generation of core memory, the donuts became smaller and smaller.

DEC core plane  -  8k x 19 bits. Click on image to enlarge. . Dimensions: 10.5 inches wide by 8 inches high. The connection fingers have been snipped off in order to salvage the gold. (Photo by Jerry Proc)